Шукати за:
Conversion of VLSI Layout Data Using Parallel Computing
Повний текст (PDF)
УДК: 004.424.2, 004.624
Мова публікації: Російська
Stuc. intelekt. 2012; 17; (3):60-72
Анотація: In this paper, we propose algorithms and software for parallel implementation of conversion of VLSI Layout Data from CAD format Gerber and MEBES into an internal representation and then into format of automatic mask inspection system T29. The software is developed on basis of OpenMP technology to work on PC with 4-core processor. It is shown that using parallel computing speeds up a conversion process. In the future we are planning to develop similar tools for data conversion from CIF and DFX formats into the internal format, and further into format GDS-II. These tools allow developing a program complex of topological data processing to work with automatic mask inspection system made by R&D Company “KBTEM-OMO” of “Planar” Corporation.
Ключові слова: data conversion, parallel computing, VLSI, routing mask.
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