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Архітектура родини обчислювальних систем, що реконфігуруються, на основі ПЛІС
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UDC: 004.272.43
Publication Language: Russian
Stuc. intelekt. 2008; 13(3):663-673
Abstract: In the article is given description of architecture and design principles of family of reconfigurable computer systems with dynamically reconfigurable architecture on the base of FPGA and performance up to 6 TFlops. The family is designed within the framework of Federal program budgeting “Research and development on priority directions of Russian scientific and technological complex development in 2007-2012”. As a basic computational element in these systems are used VLSI FPGAs instead of general-purpose microprocessors. All representatives of the family are considered to be used for solving tasks of high computational complexity from various problem areas. Computer systems provide real performance above 50 % from peak performance on wide class of tasks and have practically linear performance growth during hardware resource increasing.
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